
COMMERCIALTEMPERATURERANGE
14
IDTCV115-2
PROGRAMMABLEFLEXPCCLOCKFORP4PROCESSOR
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
ZO
Current Source Output Impedance(2) VO = VX
3000
—
Ω
VOH3
Output HIGH Voltage
IOH = -1mA
2.4
—
V
VOL3
Output LOW Voltage
IOL = 1mA
—
0.4
V
VHIGH
Voltage HIGH(2)
Statistical measurement on single-ended signal using
660
—
850
mV
VLOW
Voltage LOW(2)
oscilloscope math function
–150
—
150
VOVS
Max Voltage(2)
Measurement on single-ended signal using absolute value
—
1150
mV
VUDS
Min Voltage(2)
–300
—
VCROSS(ABS)
Crossing Voltage (abs)(2)
250
—
550
mV
d - VCROSS
Crossing Voltage (var)(2)
Variation of crossing over all edges
—
140
mV
ppm
Long Accuracy(2,3)
See TPERIOD Min. - Max. values
–300
—
300
ppm
400MHz nominal/spread
2.4993
—
2.5008
333.33MHz nominal/spread
2.9991
—
3.0009
266.66MHz nominal/spread
3.7489
—
3.7511
TPERIOD
Average Period(3)
200MHz nominal/spread
4.9985
—
5.0015
ns
166.66MHz nominal/spread
5.9982
—
6.0018
133.33MHz nominal/spread
7.4978
—
7.5023
100MHz nominal/spread
9.997
—
10.003
96MHz nominal
10.4135
—
10.4198
400MHz nominal/spread
2.4143
—
333.33MHz nominal/spread
2.9141
—
266.66MHz nominal/spread
3.6639
—
200MHz nominal/spread
4.9135
—
TABSMIN
Absolute Min Period(2,3)
166.66MHz nominal/spread
5.9132
—
ns
133.33MHz nominal/spread
7.4128
—
100MHz nominal/spread
9.912
—
96MHz nominal
10.1635
—
tR
Rise Time(2)
VOL = 0.175V, VOH = 0.525V
175
—
700
ps
tF
Fall Time(2)
VOL = 0.175V, VOH = 0.525V
175
—
700
ps
d-tR
Rise Time Variation(2)
—
125
ps
d-tF
Fall Time Variation(2)
—
125
ps
dT3
Duty Cycle(2)
Measurement from differential waveform
45
—
55
%
tSK3
Skew(2)
VT = 50%
—
100
ps
tJCYC-CYC
Jitter, Cycle to Cycle(2)
Measurement from differential waveform
—
85
ps
ELECTRICAL CHARACTERISTICS - CPU, SRC, AND DOT96 0.7 CURRENT MODE
DIFFERENTIAL PAIR(1)
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = 0°C to +70°C, Supply Voltage: VDD = 3.3V ± 5%; CL = 2pF
NOTES:
1.
SRC clock outputs run only at 100MHz or 200MHz. Specs for 133.33 and 166.66 do not apply to SRC clock pair.
2.
This parameter is guaranteed by design, but not 100% production tested.
3.
All long term accuracy and clock period specifications are guaranteed with the assumption that the REF output is at 14.31818MHz.